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Add powerpcspe to ostable and triplettable
The 'powerpcspe' architecture is a binary-incompatible variant of PowerPC/POWER designed and supported by FreeScale and IBM. It is also known under the trade names "e500"/"MPC8500" and "e200"/"MPC5xx". Additional information can be found at: http://en.wikipedia.org/wiki/PowerPC_e500 http://en.wikipedia.org/wiki/PowerPC_e200 In particular, the 'powerpcspe' architecture lacks the classic FPU with dedicated FPRs found on most other PowerPC systems. It is replaced with a set of "SPE" instructions which perform floating-point operations on the integer registers. In an unfortunate choice of architecture design, the instructions used for the "SPE" operations overlap with those for the AltiVec unit on most other modern PowerPC cores. The "e500v2"-series chips have 64-bit GPRs, where the high 32-bits are accesible only via the special "SPE" instructions, allowing them to make efficient use of the "double" datatype. The relative rare "e500v1"-series chips have only 32-bit GPRs, and require software traps and emulation to support native "double". The "e200z3" and "e200z6" chips have no support for floating point at all, but with software traps and emulation are binary-compatible with the "e500"-series chips. The Debian port to this architecture specifically chooses to optimize for the higher-end chips (e500v2), as most of the others are targeted at automotive applications or no longer in production. The specific GNU triplet for this arch is "powerpc-linux-gnuspe". As a result, we end up adding an extra "ostable" entry instead of one in "cputable". Closes: #568123, #575158 Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Guillem Jover <guillem@debian.org>
Kyle Moffett
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debian/changelog
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ostable
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triplettable
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